| Designation |
Senior Technical Officer |
| Email Id |
mailto : sreejeesh[at]nielit[dot]gov[dot]in |
| Phone No |
9447769756 |
| Qualification |
M.Tech, B.Tech(Electronics & Comm. Engg) |
| Area of Specialization |
VLSI Design and Verification, Ultrasound System Prototyping, FPGA, ASIC, Signal Processing. |
| Experience |
More than 18 years |
| Research Interests |
- Design and Development of VLSI Systems.
- Ultrasound Imaging, FPGA Implementations. ASIC Development.
- Digital beamforming, Parallel Architectures Ultrasound Imaging, FPGA based System Design
|
| Duties & Responsibilities |
- Research & Development Projects (Ultrasound System),
- Array Signal Processor (SMDP III)- Tape Out (RTL to GDSII).
- Coordinator for Advanced Diploma VLSI Physical Design Engineer, Certificate Program in MATLAB Fundamentals
- Faculty for PG Diploma VLSI & Embedded Hardware Design,
- ASIC Design &Verification, Advanced Diploma in VLSI Physical Design Engineer, Coordination of Workshops for the VLSI Group, Faculty Development Programs etc.
- NCS Portal related Training Programmes.
- Social Media in-Charge for the Centre.
- Online Course Management for the VLSI Group.
- Lab in-Charge of VLSI Group
|
| Publications |
https://www.researchgate.net/profile/Sreejeesh-Sg-2
|
English
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