Foundation Course in VLSI Design' of 90 Hrs and 'Certified VLSI Design Engineer' of 480 Hrs from 21-August-2023. All together 31 students are getting trained in these courses at NIELIT Aurangabad. Students get deep knowledge about IC Design flow, Hardware modeling using Verilog HDL, VLSI Verification Techniques etc. Dr. Jayaraj U.Kidav, ED, NIELIT Aurangabad is the chief resource person and  Mr. Shashank Singh is the Course Coordinator of these courses.