Objective of the Course

This course is frequently updated in synchronization with the industry to provide the trainees in-depth knowledge and skills required by Embedded & VLSI markets around the globe. It provides comprehensive understanding about the fundamental principles, methodologies and industry practices.

Learning Outcomes:

• After the completion of the course, Students acquire hands-on experience in using CAD tools in VLSI design.
• To be able to understand designed functional Analog and digital system and Mixed signal design into a target FPGA..
• Handling of EDA tools Hardware and Software for development of VLSI Circuitry.
• Able to specify components and equipment required for VLSI product development.
• They will understand type of Programmable Logic Devices, FPGA,CLB and flip flops, RAM
• Gain knowledge related to different Methodology like OVM, UVM, AVM and ABV used in in VLSI and MOSFET fabrication for Designing of VLSI components.
• Will explore the CMOS fabrication technique and its different properties and understanding SPICE tool for simulation.
• Handling of prototype and pre-production VLSI product for various electronic system and liaise with supplier for production implementations.

Duration of the Course  :     400 hrs

Minimum Eligibility Criteria :

• Diploma Holder, B Sc. Graduate 
• Pursuing and Passed (B.Tech/ M.tech/M Sc.) 

Outline of Course:

Title of Component and Identification Code	Mandatory/ Optional	Estimated Size (Learning hours)
INTRODUCTION VLSI Design Flow and Y-Chart, Front-Back End VLSI Design and Verilog and Simple Logic Gates Coding	Mandatory	25
Programmable Logic Devices (PLDs) Introduction, PLDs Types-Simple PLDs (SPLDs), Complex PLDs (CPLDs) and Field Programmable Gate Array (FPGA),	Mandatory	35
System Verilog Code Structure and FPGA Implementation Module Declaration Analog Block Statements, Mathematical Functions.	Mandatory	100
VLSI Technology Basic MOS Transistor Operations and Electrical Properties, Fabrication Process, Development in Technology.	Mandatory	40
VLSI Design- Part 1 VLSI Design Style, CMOS Fabrication and Electrical Properties, Dynamic, Clocked, Domino CMOS Logic VLSI Design Style,	Mandatory	40
SPICE Modeling for VLSI Design-Part 2 SPICE Tutorials and Commands, Sources and Passive Components, CMOS Inverter Transient Analysis,	Mandatory	100
File Interchange Format for VLSI Design Need for File Inter Change,	Mandatory	30
Design Verification Functional and Test Bench Verification using System, Verification Methodology-OVM, UVM, AVM and ABV Verilog,	Mandatory	30

NSQF Level: 5                                             View Qualification File

Course Fee:  Rs. 22,000/-+GST   

NSQF Registration + Examination Fee: Rs. 1400/-+GST

Total Fee: Rs. 23400/- + GST

Installment Payment Details:                    Payment Procedure

At the time of Admission                  :           Rs. 10,400/-+GST + Rs. 250/-

After one month of batch start           :         Rs. 8,000/-+GST

After two month of batch start             :       Rs. 5,000 /-+GST